Bitsilica: DV/ RTL Design Engineers

The Bitsilica is supporting clients in developing complex ASIC/SoCs with our expertise in processors, mobile, networking, automotive, 5G, and multimedia technologies. The Bitsilica invites application for the following posts

DV/ RTL Design Engineers

Eligibility: B.Tech (EEE or ECE) 2021 pass out graduates with 60% aggregate and no backlogs only need to apply

Skills:

• Good Communication Skills
• Skilled in Logical Thinking

Interview Procedure:

• 1st round: F2F with HR
• 2nd round: F2F with Manager technical HR
• 3rd round: Final Round with HR

How to Apply: Candidates can apply online only [https://forms.gle/i9tv5QgQA8gKTJho9]

For more details please contact:

• Contact Person: Mr. Manas M Sharma
• Email ID: [e-mail]
• Contact Number: 040 - 48488247

Also Check: IIT Hyderabad Notification 2022 Senior Research Fellow

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