ASIC RTL Design Engineer Job in Google

Google invites application for the post of ASIC RTL Design Engineer.

Job Role: ASIC RTL Design Engineer

Qualifications:

• Bachelor's degree in Electrical Engineering or equivalent practical experience
• Experience in design and multi-power domains with clocking
• Experience in coding using Verilog or System Verilog

Preferred qualifications:

• Master's degree in Electrical Engineering, or a related field.
• 4 years of experience in RTL coding from domains such as interconnect, coherency/non-coherency, or cache
• Proficiency with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, UPF, and Low Power Optimization/Estimation
• Understanding of cross-domain involving domain validation, design for testing, physical design, and software

Location: Bangalore

For more details, please visit: google.com/about/careers/applications/jobs/results/104479204151567046-asic-rtl-design-engineer?location=India

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